Control and configuration registers
| RX_ENA | write this bit to enable the bitscrambler rx |
| RX_PAUSE | write this bit to pause the bitscrambler rx core |
| RX_HALT | write this bit to halt the bitscrambler rx core |
| RX_EOF_MODE | write this bit to ser the bitscrambler rx core EOF signal generating mode which is combined with reg_bitscrambler_rx_tailing_bits, 0: counter by read peripheral buffer, 0 counter by write dma fifo |
| RX_COND_MODE | write this bit to specify the LOOP instruction condition mode of bitscrambler rx core, 0: use the little than operator to get the condition, 1: use not equal operator to get the condition |
| RX_FETCH_MODE | write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch by reset, 1: fetch by instrutions |
| RX_HALT_MODE | write this bit to set the bitscrambler rx core halt mode when rx_halt is set, 0: wait write data back done, , 1: ignore write data back |
| RX_RD_DUMMY | write this bit to set the bitscrambler rx core read data mode when EOF received.0: wait read data, 1: ignore read data |
| RX_FIFO_RST | write this bit to reset the bitscrambler rx fifo |